**** AGGREGATE FILE 56-25C.txt 5/17/01 **** ============================================================ **** FILE 56B-25C.txt **** These SED1356 register contents were taken while displaying a 160x240x8 image on a KRS025EV0AC Kyocera LCD module. The SED1356 was on an SDU1356BOC evaluation board by Epson, distributed by Kyocera as part of their SED1356 evaluation kit. CONNECTIONS This board was mounted in a PCI slot, connected to a special Kyocera KK5 interface board via a 40pin cable. The special KK5 has a unique 22 pin x 1mm pitch FFC connector for the special 1 mm pitch FFC required by this KRS025EV0AC. The more typical KRS025EV0AB uses a 0.5 mm pitch FFC and would have been connected to the connector of the KK5 No.1 labeled "CN4" on a white paper label. REGISTER CONFIGURATION I made a copy of 1356BMP.EXE, renamed 56B-25c.EXE and ran 1356CFG.EXE to configure it as follows: PANEL TAB (The following settings are absolutely required by the Kyocera KRS025EV LCD panel) single, color, format2, STN, 8bit, FPline Hi, FPframe Hi, 160 width, 240 height. (The following settings are interrelated and many different combinations are possible. Section 5 of the Kyocera spec gives the required ranges for frame rate and pixel clock. Anytime you change a value, 1356CFG.exe may change some other value to make your change possible. Play with it until all values are satisfactory. Here is what I ended up with.) Non-Display Period horz 32 pixels and vert 1 line, Frame Rate 77Hz, Pixel Clock 3.579mHz, Predefined Panels showed "Custom Panel". CLOCKS TAB (I did not set anything under this tab. The values shown are the result of settings made under the PANEL TAB.) CLKI is auto and 25.175MHz greyed out, LCD PCLK Source and Divide is CLKI2 and auto and 4:1 marked and greyed out, CLKI2 is auto and 14.318 MHz is greyed out, CRT/TV PCLK Source and Divide is CLKI and auto and 1:1 marked and greyed out, BUSCLK is 40.000MHz without check mark, MCLK Source and Divide is BUSCLK and 1:1, Media Plug Clk is CLKI2 and 1:1. DEFAULTS TAB Initial Display is Panel, Swivel View is 0 deg, Panel color depth is 4 bpp, TV color depth is 8. OTHER TABS WERE NOT SET BY ME AND SEEMED TO DEFAULT CORRECTLY TO MY PC'S PARAMETERS. SAVING CONFIGURATION VALUES Run 1356CFG.exe under windows. To get the initial values, open 1356BMP.exe or a copy of it, for example 56B-25c.exe. Then modify as above. Then click "Save in..", highlight the same program you just opened, click "Add>" to move it to the right hand screen, click "configure" to write in the new values. OPERATING THE LCD Run the program renamed 56B-25c.exe and configured as above at the prompt on the MS-DOS emulation screen. For example c:\...>56B-25c co8-1624.bmp Given the large memory of the SED1356, this program seems to display any .bmp image on the Kyocera KRS025EV. It displays the image in the upper left corner, and black filling any non-image area to the right or bottom and truncating images larger than the display screen, just as you would expect. The SED1356 has 2MB of memory, so it should display images up to this size. But, unlike the 1374, it will not correctly display images with 1 bpp color. The default color depth of 4 bpp under the default tab seems to an initializing value, used by the program before it opens the .bmp file. REGISTER VALUES Below are the register contents resulting from this configuration, obtained by running 1356PLAY.exe at the MS-DOS, and entering commands "xa", then "q". Robert Joslyn 3/21/2001 800-826-0527 ============================================== 1356PLAY - test utility - version 2.01 (HAL 2.09) Register Start Addr: Configured by system Display Memory Start Addr: Configured by system = [0000] 11 00 00 00 06 00 00 00-04 00 00 00 5E 84 00 00 [0010] 01 00 00 00 32 00 00 00-00 00 00 00 02 00 01 00 [0020] 00 04 00 00 00 00 00 00-00 00 01 01 00 00 00 00 [0030] 1C 00 13 00 03 01 0B 00-EF 00 00 0B 01 00 65 00 [0040] 03 00 00 00 00 00 50 00-00 00 00 00 00 00 00 00 [0050] 4F 00 13 01 0B 00 DF 01-2B 09 01 10 00 00 00 00 [0060] 83 00 00 00 00 00 40 01-00 00 00 00 00 00 00 00 [0070] 00 01 00 00 00 00 00 00-00 00 1F 3F 1F 00 00 00 [0080] 00 01 00 00 00 00 00 00-00 00 1F 3F 1F 00 00 00 [0100] 00 00 00 00 00 00 00 00-00 00 00 00 00 00 00 00 [0110] 00 00 00 00 00 00 00 00-00 00 00 00 00 00 00 00 [01E0] 01 00 00 00 00 00 00 00-00 00 00 00 00 00 00 00 [01F0] 00 00 00 00 00 00 00 00-00 00 00 00 01 00 00 00 [1000] 0011 0000 0006 0000-0004 0000 845E 0000 = =========================================================== //---------------------------------------------------------------------------- // File generated by 1356CFG.EXE // **** File 56B-25C.txt **** // **** Formatted print of the register configuration in 56B-25c.exe above **** //---------------------------------------------------------------------------- // Panel: (active) 160x240 77Hz STN Single 8-bit (PCLK=CLKI2/4=3.579MHz) (Color Format 2) // CRT: (inactive) 640x480 60Hz (PCLK=CLKI=25.175MHz) // Memory: 50ns EDO-DRAM 2-CAS#: 8ms refresh (MCLK=BUSCLK=40.000MHz) 0x0001, 0x00, Miscellaneous Register ,0x01fc, 0x00, Display Mode Register 0x0004, 0x00, General IO Pins Configuration Register ,0x0008, 0x00, General IO Pins Control Register 0x0010, 0x01, Memory Clock Configuration Register ,0x0014, 0x32, LCD Pixel Clock Configuration Register 0x0018, 0x00, CRT/TV Pixel Clock Configuration Register ,0x001c, 0x02, MediaPlug Clock Configuration Register 0x001e, 0x01, CPU To Memory Wait State Select Register ,0x0020, 0x00, Memory Configuration Register 0x0021, 0x04, DRAM Refresh Rate Register ,0x002a, 0x01, DRAM Timings Control Register 0 0x002b, 0x01, DRAM Timings Control Register 1 ,0x0030, 0x1c, Panel Type Register 0x0031, 0x00, MOD Rate Register ,0x0032, 0x13, LCD Horizontal Display Width Register 0x0034, 0x03, LCD Horizontal Non-Display Period Register ,0x0035, 0x01, TFT FPLINE Start Position Register 0x0036, 0x0b, TFT FPLINE Pulse Width Register ,0x0038, 0xef, LCD Vertical Display Height Register 0 0x0039, 0x00, LCD Vertical Display Height Register 1 ,0x003a, 0x00, LCD Vertical Non-Display Period Register 0x003b, 0x0b, TFT FPFRAME Start Position Register ,0x003c, 0x01, TFT FPFRAME Pulse Width Register 0x0040, 0x02, LCD Display Mode Register ,0x0041, 0x00, LCD Miscellaneous Register 0x0042, 0x00, LCD Display Start Address Register 0 ,0x0043, 0x00, LCD Display Start Address Register 1 0x0044, 0x00, LCD Display Start Address Register 2 ,0x0046, 0x28, LCD Memory Address Offset Register 0 0x0047, 0x00, LCD Memory Address Offset Register 1 ,0x0048, 0x00, LCD Pixel Panning Register 0x004a, 0x00, LCD Display FIFO High Threshold Control Register ,0x004b, 0x00, LCD Display FIFO Low Threshold Control Register 0x0050, 0x4f, CRT/TV Horizontal Display Width Register ,0x0052, 0x13, CRT/TV Horizontal Non-Display Period Register 0x0053, 0x01, CRT/TV HRTC Start Position Register ,0x0054, 0x0b, CRT/TV HRTC Pulse Width Register 0x0056, 0xdf, CRT/TV Vertical Display Height Register 0 ,0x0057, 0x01, CRT/TV Vertical Display Height Register 1 0x0058, 0x2b, CRT/TV Vertical Non-Display Period Register ,0x0059, 0x09, CRT/TV VRTC Start Position Register 0x005a, 0x01, CRT/TV VRTC Pulse Width Register ,0x005b, 0x10, TV Output Control Register 0x0060, 0x03, CRT/TV Display Mode Register ,0x0062, 0x00, CRT/TV Display Start Address Register 0 0x0063, 0x00, CRT/TV Display Start Address Register 1 ,0x0064, 0x00, CRT/TV Display Start Address Register 2 0x0066, 0x40, CRT/TV Memory Address Offset Register 0 ,0x0067, 0x01, CRT/TV Memory Address Offset Register 1 0x0068, 0x00, CRT/TV Pixel Panning Register ,0x006a, 0x00, CRT/TV Display FIFO High Threshold Control Register 0x006b, 0x00, CRT/TV Display FIFO Low Threshold Control Register ,0x0070, 0x00, LCD Ink/Cursor Control Register 0x0071, 0x01, LCD Ink/Cursor Start Address Register ,0x0072, 0x00, LCD Cursor X Position Register 0 0x0073, 0x00, LCD Cursor X Position Register 1 ,0x0074, 0x00, LCD Cursor Y Position Register 0 0x0075, 0x00, LCD Cursor Y Position Register 1 ,0x0076, 0x00, LCD Ink/Cursor Blue Color 0 Register 0x0077, 0x00, LCD Ink/Cursor Green Color 0 Register ,0x0078, 0x00, LCD Ink/Cursor Red Color 0 Register 0x007a, 0x1f, LCD Ink/Cursor Blue Color 1 Register ,0x007b, 0x3f, LCD Ink/Cursor Green Color 1 Register 0x007c, 0x1f, LCD Ink/Cursor Red Color 1 Register ,0x007e, 0x00, LCD Ink/Cursor FIFO Threshold Register 0x0080, 0x00, CRT/TV Ink/Cursor Control Register ,0x0081, 0x01, CRT/TV Ink/Cursor Start Address Register 0x0082, 0x00, CRT/TV Cursor X Position Register 0 ,0x0083, 0x00, CRT/TV Cursor X Position Register 1 0x0084, 0x00, CRT/TV Cursor Y Position Register 0 ,0x0085, 0x00, CRT/TV Cursor Y Position Register 1 0x0086, 0x00, CRT/TV Ink/Cursor Blue Color 0 Register ,0x0087, 0x00, CRT/TV Ink/Cursor Green Color 0 Register 0x0088, 0x00, CRT/TV Ink/Cursor Red Color 0 Register ,0x008a, 0x1f, CRT/TV Ink/Cursor Blue Color 1 Register 0x008b, 0x3f, CRT/TV Ink/Cursor Green Color 1 Register ,0x008c, 0x1f, CRT/TV Ink/Cursor Red Color 1 Register 0x008e, 0x00, CRT/TV Ink/Cursor FIFO Threshold Register ,0x0100, 0x00, BitBlt Control Register 0 0x0101, 0x00, BitBlt Control Register 1 ,0x0102, 0x00, BitBlt ROP Code/Color Expansion Register 0x0103, 0x00, BitBlt Operation Register ,0x0104, 0x00, BitBlt Source Start Address Register 0 0x0105, 0x00, BitBlt Source Start Address Register 1 ,0x0106, 0x00, BitBlt Source Start Address Register 2 0x0108, 0x00, BitBlt Destination Start Address Register 0 ,0x0109, 0x00, BitBlt Destination Start Address Register 1 0x010a, 0x00, BitBlt Destination Start Address Register 2 ,0x010c, 0x00, BitBlt Memory Address Offset Register 0 0x010d, 0x00, BitBlt Memory Address Offset Register 1 ,0x0110, 0x00, BitBlt Width Register 0 0x0111, 0x00, BitBlt Width Register 1 ,0x0112, 0x00, BitBlt Height Register 0 0x0113, 0x00, BitBlt Height Register 1 ,0x0114, 0x00, BitBlt Background Color Register 0 0x0115, 0x00, BitBlt Background Color Register 1 ,0x0118, 0x00, BitBlt Foreground Color Register 0 0x0119, 0x00, BitBlt Foreground Color Register 1 ,0x01e0, 0x00, Look-Up Table Mode Register 0x01e2, 0x00, Look-Up Table Address Register ,0x01e4, 0x00, Look-Up Table Data Register 0x01f0, 0x00, Power Save Configuration Register ,0x01f1, 0x00, Power Save Status Register 0x01f4, 0x00, CPU-to-Memory Access Watchdog Timer Register ,0x01fc, 0x01, Display Mode Register =========================================================== **** FILE 56B-25C9.txt **** These SED1356 register contents were taken while displaying a 240x160x8 image rotated 90 degrees onto a KRS025EV0AC Kyocera LCD module. The SED1356 was on an SDU1356BOC evaluation board by Epson, distributed by Kyocera as part of their SED1356 evaluation kit. The board and the SED1356 registers were configured exactly as described in 56B-25C.txt However this test was executed as c:\...>56B-25C LA8-2416.bmp /r90 The LCD was still 160x240. 56B-25C.exe was still configured as 160x240x4 with swivelView initially set to zero. But the image was 240x160x8 and swivelView was set to 90 degrees at execution. Below are the register values during swivelView=90, for comparison with 56B-25c.txt. Robert Joslyn 3/21/2001 800-826-0527 ============================================== 1356PLAY - test utility - version 2.01 (HAL 2.09) Register Start Addr: Configured by system Display Memory Start Addr: Configured by system = [0000] 11 00 00 00 06 00 00 00-04 00 00 00 5E 84 00 00 [0010] 01 00 00 00 32 00 00 00-00 00 00 00 02 00 01 00 [0020] 00 04 00 00 00 00 00 00-00 00 01 01 00 00 00 00 [0030] 1C 00 13 00 03 01 0B 00-EF 00 00 0B 01 00 E3 00 [0040] 03 00 B0 01 00 00 00 02-00 00 00 00 00 00 00 00 [0050] 4F 00 13 01 0B 00 DF 01-2B 09 01 10 00 00 00 00 [0060] 83 00 00 00 00 00 40 01-00 00 00 00 00 00 00 00 [0070] 00 01 00 00 00 00 00 00-00 00 1F 3F 1F 00 00 00 [0080] 00 01 00 00 00 00 00 00-00 00 1F 3F 1F 00 00 00 [0100] 00 00 00 00 00 00 00 00-00 00 00 00 00 00 00 00 [0110] 00 00 00 00 00 00 00 00-00 00 00 00 00 00 00 00 [01E0] 01 00 00 00 10 00 00 00-00 00 00 00 00 00 00 00 [01F0] 00 00 00 00 00 00 00 00-00 00 00 00 41 00 00 00 [1000] 0011 0000 0006 0000-0004 0000 845E 0000 = ===========================================================